Cadence Design Techniques, Inc. has introduced the LPDDR5X reminiscence interface IP design optimised to function at 8533Mbps as much as 33% sooner than the earlier technology of LPDDR IP. Accessible now for buyer engagements, the Cadence LPDDR5X IP boasts a brand new high-performance, scalable and adaptable structure based mostly on Cadence’s confirmed and extremely profitable LPDDR5 and GDDR6 product strains. The brand new Cadence LPDDR5X reminiscence IP answer consists of a silicon-proven PHY and high-performance controller designed to hook up with LPDDR5X DRAM gadgets that observe the JEDEC JESD209-5B normal. The controller/PHY interface relies on the most recent DFI 5.1 specification, and quite a lot of on-chip buses are supported.
LPDDR5X reminiscence opens up all kinds of high-bandwidth functions past the cell market historically served by LPDDR reminiscence, together with superior driver help techniques (ADAS), autonomous driving, lower-end edge AI and networking. Cadence LPDDR5X IP is designed to allow the SoC designs for these and different functions with versatile floorplan design choices, whereas the brand new structure permits fine-tuning of energy and efficiency based mostly on particular person software necessities.
Cadence design IP helps the quickest information price outlined by the JEDEC normal (JESD209-5B). Cadence’s LPDDR5X Controller and PHY have been verified with Cadence’s Verification IP (VIP) for LPDDR5X to offer speedy IP and SoC verification closure. Cadence VIP for LPDDR5X features a full answer from IP to system-level verification with DFI VIP, LPDDR5X reminiscence mannequin and System Efficiency Analyser.
“LPDDR5X’s peak speeds will elevate the bar for system experiences and efficiency on the edge, from automotive to shopper IoT to networking gadgets,” says Michael Basca, vp of merchandise and techniques in Micron’s Embedded Enterprise Unit. “Our collaboration with Cadence will speed up ecosystem adoption of LPDDR5X by enabling the following wave of chipsets to work seamlessly with this low-power, high-performance reminiscence.”
“Cadence LPDDR5X IP working at 8533Mbps in silicon showcases Cadence’s next-generation structure for full reminiscence system IP options,” notes Sanjive Agarwala, company vp and basic supervisor of the IP Group at Cadence. “This new reminiscence IP answer solidifies our reminiscence interface IP management by enabling the trade’s future AI, automotive and cell SoC designs at present.”
The LPDDR5X IP helps Cadence’s Clever System Design technique, which permits SoC design excellence with high-performance, design-optimised, know-how.
For extra info on the LPDDR5X IP, please go to right here.
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